InPsytech, Inc., a silicon intelligence manufacturer under the ASX Group and focusing on advanced interconnection and memory interface technology, released a 64Gbps die-connection PHY + controller IP design kit this week. The kit optimizes advanced...
InPsytech, Inc., a silicon intelligence manufacturer under the ASX Group and focusing on advanced interconnection and memory interface technology, released a 64Gbps die-connection PHY + controller IP design kit this week. The kit optimizes advanced 3nm process and can assist the chip design team in accelerating feasibility study, planar planning and system integration, further shortening the product development process of the new generation of multi-grain systems.
SHIELD pointed out that the solution launched by Qianzhan Technology this time has a variety of key technical features, including complete compliance with the latest UCIe 3.0 regulations and downward compatible with existing standards, ensuring that the design team can successfully extend the existing structure. At the same time, the kit combines the complete PHY+ controller design suite to provide the integrated solutions required for multi-grain interoperability. In terms of agreement support, the controller can cover a variety of interfaces such as AXI4, CXS.B, CXL, Streaming and PCIe, meeting diverse application needs.
In addition, this solution has advantages in performance, with a wider data eye opening, which can achieve a 1E-27-bit error rate (BER) without relying on FEC (forward error correction mechanism), and provides per-bit real-time health monitoring function. In addition, its leading industry power consumption is 0.2pJ/bit, which greatly reduces energy consumption while both high frequency width and high efficiency. The product design is also flexible and can support two application scenarios of advanced packaging and organic substrates.
SHIELD pointed out that the suite has a wide range of applications and is especially suitable for high-performance computing (HPC) grains, xPU and AI grains, memory expansion grains, and multi-grain designs requiring high line frequency width density. At the same time, it can also support optical I/O grains, providing a strong support for the integration of the new generation of systems.
Qianzhan is also a member of the Samsung SAFE IP Program and Intel Foundry Accelerator IP Alliance, and has been focusing on developing high-speed interconnection and memory interface IP with high performance, low latency and low power consumption. Its products are widely used in fields such as artificial intelligence (AI), high-performance computing (HPC), vehicle electronics and high-speed optical and electronic communications. With deep research and development expertise and continuous innovation, Qianzhan is committed to providing global customers with the most advanced interoperable solutions.
